| ParameterMinimum Value Typical Value Maximum ValueUnit | ||||
| Power supply voltage | 3 | 5 | 5.5 | VDC |
| Output comprehensive accuracy | ±0.1 | ±0.2 | %FS | |
| Repeatability | ±0.3 | ±0.5 | %FS | |
| Hysteresis | ≤0.1 | %FS | ||
| Overload pressure | ≤0.1 | 150 | %FS | |
| ESD protection | 2000 | V | ||
| Storage temperature | - 40~125 | °C | ||
| Working temperature | - 40~100 | °C | ||
| Compensation temperature range | - 20~80 | °C | ||
| Long - term stability | ±0.2 | %FS/year | ||
| Temperature drift coefficient | 0.005 | 0.01 | 0.02 | %FS/°C |
| Power - on time | 80 | ms | ||
| I²C clock speed | 50 | 400 | KHz |
The XT - 194 - 2 I²C digital pressure sensor is a digital I²C output pressure sensor provided for users. It has a built - in temperature compensation sensor, which can perform real - time compensation for zero - point error and temperature drift, sensitivity error and temperature drift, and non - linearity error of the sensor signal. The output conforms to the pressure and temperature data of the I²C interface protocol. It has high cost - performance, accurate measurement, and reliability. The internal circuit of the sensor adopts anti - static and anti - surge design, greatly enhancing the on - site adaptability. It is suitable for measuring pressure in applications that are sensitive to power consumption requirements.
| NumberElectrical DefinitionWire Color | ||
| 1 | Power supply positive (VCC) | Red |
| 2 | Power supply negative (GND) | Yellow |
| 3 | Data line (SDA) | Blue |
| 4 | Clock line (SCL) | Green |
XT - 194 - 2 uses the I²C bus protocol for external communication. The I²C bus uses SCL and SDA as signal lines. Both lines are connected to AVDD through pull - up resistors. The default device address of this product is OXFE, which can be changed. The device addresses are as follows:
| A7A6A5A4A3A2A1W/R | |||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0/1 |
| MarkParameterMinimum ValueMaximum ValueUnit | ||||
| fsc1 | Clock frequency | 400 | kHz | |
| tLOW | Clock low - pulse duration time | 1.3 | μs | |
| tHIGH | Clock high - pulse duration time | 0.6 | μs | |
| tSUDAT | SDA setup time | 0.1 | μs | |
| tHDDA T | SDA hold time | 0.0 | μs | |
| tSUSTA | Each start setup time | 0.6 | μs | |
| tHDSTA | Start condition hold time | 0.6 | μs | |
| tSUSTO | Stop time setup time | 0.6 | μs | |
| tBUF | Two - communication time interval time | 1.3 | μs |
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